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FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
The 33887 Simplified Internal Block Diagram shown in
Figure 2 , page 2 , is a fully protected monolithic H-Bridge with
Enable, Fault Status reporting, and High-Side current sense
feedback to accommodate closed-loop PWM control. For a
DC motor to run, the input conditions need be as follows:
Enable input logic HIGH, D1 input logic LOW, D2 input logic
HIGH, FS flag cleared (logic HIGH), one IN logic LOW and
the other IN logic HIGH (to define output polarity). The 33887
can execute dynamic braking by simultaneously turning on
either both high-side MOSFETs or both low-side MOSFETs
in the output H-Bridge; e.g., IN1 and IN2 logic HIGH or IN1
and IN2 logic LOW.
The 33887 outputs are capable of providing a continuous
DC load current of 5.0 A from a 28 V V+ source. An internal
charge pump supports PWM frequencies to 10 kHz. An
external pull-up resistor is required at the FS pin for fault
status reporting. The 33887 has an analog feedback (current
mirror) output pin (the FB pin) that provides a constant-
current source ratioed to the active high-side MOSFET. This
can be used to provide “real time” monitoring of load current
to facilitate closed-loop operation for motor speed/torque
control.
Two independent inputs (IN1 and IN2) provide control of
the two totem-pole half-bridge outputs. Two disable inputs
(D1 and D2 ) provide the means to force the H-Bridge outputs
to a high-impedance state (all H-Bridge switches OFF). An
EN pin controls an enable function that allows the 33887 to
be placed in a power-conserving sleep mode.
The 33887 has undervoltage shutdown with automatic
recovery, active current limiting, output short-circuit latch-
OFF, and overtemperature latch-OFF. An undervoltage
shutdown, output short-circuit latch-OFF, or overtemperature
latch-OFF fault condition will cause the outputs to turn OFF
(i.e., become high impedance or tri-stated) and the fault
output flag to be set LOW. Either of the Disable inputs or V+
must be “toggled” to clear the fault flag.
Active current limiting is accomplished by a constant OFF-
time PWM method employing active current limiting threshold
triggering. The active current limiting scheme is unique in that
it incorporates a junction temperature-dependent current limit
threshold. This means the active current limiting threshold is
“ramped down” as the junction temperature increases above
160 ° C, until at 175 ° C the current will have been decreased to
about 4.0 A. Above 175 ° C, the overtemperature shutdown
(latch-OFF) occurs. This combination of features allows the
device to remain in operation for 30 seconds at junction
temperatures above 150 ° C for nonrepetitive unexpected
loads.
33887
Analog Integrated Circuit Device Data
Freescale Semiconductor
23
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